For higher integration and higher capacity of a nonvolatile semiconductor memory device, it is necessary to reduce design rules. In order to reduce the design rules, enhanced micro fabrication of wiring patterns or the like is needed. This, however, requires an extremely high level of fabrication technique, so that the reduction of the design rules is increasingly difficult.
Accordingly, nonvolatile semiconductor memory devices having three-dimensional structures have recently been suggested for higher integration of memory cells.
A common feature of these nonvolatile semiconductor memory devices is to use fin type stacked structures to obtain the three-dimensional structures. Theoretically, higher integration is achieved by increasing the number of stacked layers in the fin type stacked structure and by reducing the fin width. In order to prevent the collapse of the fin type stacked structure and enhance reliability, the fin type stacked structures are arranged perpendicularly to their extending direction, and joined to one another at one end and the other.
In this case, an assist gate is added to each of the fin type stacked structures to select one of the fin type stacked structures, and the assist gate of each of the fin type stacked structures is independently controlled. To this end, however, the assist gates of the fin type stacked structures have to be separate from one another. To separate the assist gates, the distance between the fin type stacked structures has to be great enough for the patterning of the assist gates. This is a disadvantage to higher integration.